NM Process integration and defect reduction yield engineer
Company: INTEL
Location: Albuquerque
Posted on: May 9, 2024
Job Description:
Job Description The NM DMO Yield Department is looking for
process integration and defect reduction engineers to support
interconnect and advanced packaging semiconductor chip fabrication.
Engineers in the NM DMO Yield Department will support Fab 11X and
Fab 9 for roles in Foveros, EMIB, Die Prep, Sort, Wafer Level
Assembly, and Advanced Packaging. You will partner with all areas
of the Yield Department including integration, defect reduction,
quality and reliability, device analysis, and yield analysis.
Process integration and defect reduction engineers are responsible
for sustaining semiconductor fabrication process health on products
moving from development to high volume manufacturing while
designing and implementing improvements for yield, cost, and
defects.The NM DMO Yield team seeks engineers who enjoy problem
solving, data analysis, and leading and participating in cross
organizational teams. In this role you will plan and conduct
experiments and data analysis to optimize and characterize new
fabrication processes and understand sources of variation within
the fab. You will be responsible for controlling technology change
introduction, monitoring in line defect and parametric performance
and end of line die yields, finding root cause for processing
excursions and navigating fixes. In addition, yield engineers will
receive new products from TD and ensure they are capable of high
volume manufacturing while also driving improvement to quality,
reliability, cost, yield, productivity and manufacturability.The
following skills are needed to be successful in this role:
- Creative mindset resulting in the ability to propose novel
mechanisms and solutions.
- Strong analytical and data analysis skills to identify
meaningful correlations and signals in large datasets.
- Understanding of inline detection to identify rogue equipment,
identify defect and parametric issues, and predict end of line
yield impacts.
- Project management skills to execute roadmaps that drive
defect/yield/efficiency/cost improvements based on both known
impact and program risk factors.
- Capable of understanding and implementing process control
monitoring strategies to detect out of control events which require
intervention.
- Can create strong responses to quality events to allow 24/7
disposition during preliminary, ramp, and high-volume stages of
product lifecycle. Full time onsite is required during training
(estimated 6 months). After training, hybrid "work from home" to be
defined by manager and employee, but continued onsite will be
required. Role is not eligible for full time remote work.
Qualifications Minimum Qualifications:
- Must have a Bachelor's or a Master's degree in chemical
engineering, Electrical Engineering, Mechanical Engineering,
Material Science, Microelectronics Engineering, Chemistry, Physics
or related field.
- This position is not eligible for Intel immigration
sponsorship. Preferred Qualifications:
- Demonstrated capability working in a high performing team
culture which includes excellent teamwork and leadership skills,
demonstrated problem solving and prioritization skills.
- Fundamental understanding of semiconductor process flow
- Experience with design of experiments (DOE) principles.
- Experience in high volume manufacturing (HVM)
- Experience in data analysis and statistical process control
(JMP, SQL, PCS).
- Understands concepts of statistical process control (SPC),
process capability, true spec, and variance Inside this Business
Group As the world's largest chip manufacturer, Intel strives to
make every facet of semiconductor manufacturing state-of-the-art
from semiconductor process development and manufacturing, through
yield improvement to packaging, final test and optimization, and
world class Supply Chain and facilities support. Employees in the
Technology Development and Manufacturing Group are part of a
worldwide network of design, development, manufacturing, and
assembly/test facilities, all focused on utilizing the power of
Moore's Law to bring smart, connected devices to every person on
Earth. Posting Statement All qualified applicants will receive
consideration for employment without regard to race, color,
religion, religious creed, sex, national origin, ancestry, age,
physical or mental disability, medical condition, genetic
information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or ordinance. Benefits We offer a total compensation
package that ranks among the best in the industry. It consists of
competitive pay, stock, bonuses, as well as, benefit programs which
include health, retirement, and vacation. Find more information
about all of our Amazing Benefits here. Working Model This role
will be eligible for our hybrid work model which allows employees
to split their time between working on-site at their assigned Intel
site and off-site. In certain circumstances the work model may
change to accommodate business needs.
Keywords: INTEL, Rio Rancho , NM Process integration and defect reduction yield engineer, Engineering , Albuquerque, New Mexico
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